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105 commits 1 branch 0 tags 9.9 MiB
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9 commits

Author SHA1 Message Date
Adam Greenwood-Byrne
6cc15d3b9b Added more documention to the multicore example in part10 2021-02-22 23:03:17 +00:00
Adam Greenwood-Byrne
295be0cc57 Doc update for part10-multicore 2021-02-22 12:15:47 +00:00
Adam Greenwood-Byrne
d5fcab0694 Now setting DMA transfer on CPU core 2 to show both cores free 2021-02-22 12:09:11 +00:00
Adam Greenwood-Byrne
75beaecccf Cleaned up boot.S so it's clearer where the changes are from part9 2021-02-22 11:28:55 +00:00
Adam Greenwood-Byrne
56068acbb6 Demonstrating running on both core1 and core2 now 2021-02-22 10:32:24 +00:00
Adam Greenwood-Byrne
e0b0076abc Fixed a typo in the write-up 2021-02-22 10:25:12 +00:00
Adam Greenwood-Byrne
24cde45119 Slimmed down the muilticore example 2021-02-22 10:24:12 +00:00
Adam Greenwood-Byrne
e409b722b9 A few short changes to the write-up 2021-02-21 21:47:59 +00:00
Adam Greenwood-Byrne
65560deb5a Added part10-multicore - a rough multicore approach to sound 2021-02-21 20:58:04 +00:00