mirror of
https://github.com/isometimes/rpi4-osdev
synced 2024-11-12 13:20:39 +00:00
96 lines
3.1 KiB
C
96 lines
3.1 KiB
C
// GPIO
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enum {
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PERIPHERAL_BASE = 0xFE000000,
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GPFSEL0 = PERIPHERAL_BASE + 0x200000,
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GPSET0 = PERIPHERAL_BASE + 0x20001C,
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GPCLR0 = PERIPHERAL_BASE + 0x200028,
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GPPUPPDN0 = PERIPHERAL_BASE + 0x2000E4
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};
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enum {
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GPIO_MAX_PIN = 53,
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GPIO_FUNCTION_ALT5 = 2,
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};
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enum {
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Pull_None = 0,
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};
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void mmio_write(long reg, unsigned int val) { *(volatile unsigned int *)reg = val; }
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unsigned int mmio_read(long reg) { return *(volatile unsigned int *)reg; }
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unsigned int gpio_call(unsigned int pin_number, unsigned int value, unsigned int base, unsigned int field_size, unsigned int field_max) {
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unsigned int field_mask = (1 << field_size) - 1;
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if (pin_number > field_max) return 0;
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if (value > field_mask) return 0;
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unsigned int num_fields = 32 / field_size;
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unsigned int reg = base + ((pin_number / num_fields) * 4);
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unsigned int shift = (pin_number % num_fields) * field_size;
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unsigned int curval = mmio_read(reg);
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curval &= ~(field_mask << shift);
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curval |= value << shift;
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mmio_write(reg, curval);
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return 1;
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}
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unsigned int gpio_set (unsigned int pin_number, unsigned int value) { return gpio_call(pin_number, value, GPSET0, 1, GPIO_MAX_PIN); }
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unsigned int gpio_clear (unsigned int pin_number, unsigned int value) { return gpio_call(pin_number, value, GPCLR0, 1, GPIO_MAX_PIN); }
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unsigned int gpio_pull (unsigned int pin_number, unsigned int value) { return gpio_call(pin_number, value, GPPUPPDN0, 2, GPIO_MAX_PIN); }
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unsigned int gpio_function(unsigned int pin_number, unsigned int value) { return gpio_call(pin_number, value, GPFSEL0, 3, GPIO_MAX_PIN); }
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void gpio_useAsAlt5(unsigned int pin_number) {
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gpio_pull(pin_number, Pull_None);
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gpio_function(pin_number, GPIO_FUNCTION_ALT5);
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}
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// UART
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enum {
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AUX_BASE = PERIPHERAL_BASE + 0x215000,
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AUX_ENABLES = AUX_BASE + 4,
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AUX_MU_IO_REG = AUX_BASE + 64,
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AUX_MU_IER_REG = AUX_BASE + 68,
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AUX_MU_IIR_REG = AUX_BASE + 72,
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AUX_MU_LCR_REG = AUX_BASE + 76,
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AUX_MU_MCR_REG = AUX_BASE + 80,
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AUX_MU_LSR_REG = AUX_BASE + 84,
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AUX_MU_CNTL_REG = AUX_BASE + 96,
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AUX_MU_BAUD_REG = AUX_BASE + 104,
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AUX_UART_CLOCK = 500000000,
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UART_MAX_QUEUE = 16 * 1024
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};
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#define AUX_MU_BAUD(baud) ((AUX_UART_CLOCK/(baud*8))-1)
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void uart_init() {
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mmio_write(AUX_ENABLES, 1); //enable UART1
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mmio_write(AUX_MU_IER_REG, 0);
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mmio_write(AUX_MU_CNTL_REG, 0);
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mmio_write(AUX_MU_LCR_REG, 3); //8 bits
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mmio_write(AUX_MU_MCR_REG, 0);
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mmio_write(AUX_MU_IER_REG, 0);
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mmio_write(AUX_MU_IIR_REG, 0xC6); //disable interrupts
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mmio_write(AUX_MU_BAUD_REG, AUX_MU_BAUD(115200));
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gpio_useAsAlt5(14);
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gpio_useAsAlt5(15);
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mmio_write(AUX_MU_CNTL_REG, 3); //enable RX/TX
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}
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unsigned int uart_isWriteByteReady() { return mmio_read(AUX_MU_LSR_REG) & 0x20; }
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void uart_writeByteBlockingActual(unsigned char ch) {
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while (!uart_isWriteByteReady());
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mmio_write(AUX_MU_IO_REG, (unsigned int)ch);
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}
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void uart_writeText(char *buffer) {
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while (*buffer) {
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if (*buffer == '\n') uart_writeByteBlockingActual('\r');
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uart_writeByteBlockingActual(*buffer++);
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}
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}
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