mirror of
https://github.com/isometimes/rpi4-osdev
synced 2024-11-22 10:10:45 +00:00
50 lines
1.3 KiB
C
50 lines
1.3 KiB
C
#define PERIPHERAL_BASE 0xFE000000
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#define CLOCKHZ 1000000
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struct timer_regs {
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volatile unsigned int control_status;
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volatile unsigned int counter_lo;
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volatile unsigned int counter_hi;
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volatile unsigned int compare[4];
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};
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#define REGS_TIMER ((struct timer_regs *)(PERIPHERAL_BASE + 0x00003000))
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struct arm_irq_regs_2711 {
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volatile unsigned int irq0_pending_0;
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volatile unsigned int irq0_pending_1;
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volatile unsigned int irq0_pending_2;
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volatile unsigned int res0;
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volatile unsigned int irq0_enable_0;
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volatile unsigned int irq0_enable_1;
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volatile unsigned int irq0_enable_2;
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volatile unsigned int res1;
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volatile unsigned int irq0_disable_0;
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volatile unsigned int irq0_disable_1;
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volatile unsigned int irq0_disable_2;
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};
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typedef struct arm_irq_regs_2711 arm_irq_regs;
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#define REGS_IRQ ((arm_irq_regs *)(PERIPHERAL_BASE + 0x0000B200))
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enum vc_irqs {
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SYS_TIMER_IRQ_0 = 1,
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SYS_TIMER_IRQ_1 = 2,
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SYS_TIMER_IRQ_2 = 4,
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SYS_TIMER_IRQ_3 = 8,
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AUX_IRQ = (1 << 29)
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};
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void irq_init_vectors();
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void irq_enable();
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void irq_barrier();
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void irq_disable();
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void enable_interrupt_controller();
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void disable_interrupt_controller();
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void handle_timer_1();
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void handle_timer_3();
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void enc28j60PacketSend(unsigned short buflen, void *buffer);
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void *memcpy(void *dest, const void *src, unsigned short len);
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