mirror of
https://github.com/isometimes/rpi4-osdev
synced 2024-11-12 13:20:39 +00:00
114 lines
2.5 KiB
ArmAsm
114 lines
2.5 KiB
ArmAsm
#include "sysregs.h"
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#define LOCAL_CONTROL 0xff800000
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#define LOCAL_PRESCALER 0xff800008
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#define OSC_FREQ 54000000
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#define MAIN_STACK 0x400000
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.section ".text.boot" // Make sure the linker puts this at the start of the kernel image
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.global _start // Execution starts here
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_start:
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ldr x0, =LOCAL_CONTROL // Sort out the timer
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str wzr, [x0]
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mov w1, 0x80000000
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str w1, [x0, #(LOCAL_PRESCALER - LOCAL_CONTROL)]
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ldr x0, =OSC_FREQ
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msr cntfrq_el0, x0
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msr cntvoff_el2, xzr
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// Check processor ID is zero (executing on main core), else hang
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mrs x1, mpidr_el1
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and x1, x1, #3
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cbz x1, 2f
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// We're not on the main core, so hang in an infinite wait loop
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adr x5, spin_cpu0
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1: wfe
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ldr x4, [x5, x1, lsl #3]
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cbz x4, 1b
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ldr x2, =__stack_start // Get ourselves a fresh stack - location depends on CPU core asking
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lsl x1, x1, #9 // Multiply core_number by 512
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add x3, x2, x1 // Add to the address
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mov sp, x3
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mov x0, #0
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mov x1, #0
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mov x2, #0
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mov x3, #0
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br x4
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b 1b
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2: // We're on the main core!
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// First enable the FPU
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mov x0, #0x33ff
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msr cptr_el3, x0 // Disable coprocessor traps to EL3
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mov x0, #3 << 20
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msr cpacr_el1, x0 // Enable FP/SIMD at EL1
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// Now get ready to switch from EL3 down to EL1
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ldr x0, =SCTLR_VALUE_MMU_DISABLED
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msr sctlr_el1, x0
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ldr x0, =HCR_VALUE
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msr hcr_el2, x0
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ldr x0, =SCR_VALUE
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msr scr_el3, x0
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ldr x0, =SPSR_VALUE
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msr spsr_el3, x0
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adr x0, el1_entry
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msr elr_el3, x0
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eret
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el1_entry:
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// We're in EL1
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// Clean the BSS section
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ldr x1, =__bss_start // Start address
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ldr w2, =__bss_size // Size of the section
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3: cbz w2, 4f // Quit loop if zero
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str xzr, [x1], #8
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sub w2, w2, #1
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cbnz w2, 3b // Loop if non-zero
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// Set stack to start somewhere safe
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mov sp, #MAIN_STACK
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// Jump to our main() routine in C (make sure it doesn't return)
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4: bl main
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// In case it does return, halt the master core too
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b 1b
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.ltorg
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.org 0x110
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.globl spin_cpu0
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spin_cpu0:
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.quad 0
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.org 0x118
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.globl spin_cpu1
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spin_cpu1:
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.quad 0
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.org 0x120
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.globl spin_cpu2
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spin_cpu2:
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.quad 0
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.org 0x128
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.globl spin_cpu3
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spin_cpu3:
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.quad 0
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.globl get_el
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get_el:
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mrs x0, CurrentEL
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lsr x0, x0, #2
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ret
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