Updated part14 to reflect changes to part13

part13-interrupts/README.md

@@ -35,6 +35,7 @@ The timers are set up using these calls:
 ```c
 irq_init_vectors();
 enable_interrupt_controller();
+irq_barrier();
 irq_enable();
 timer_init();
 ```
@@ -77,7 +78,7 @@ In the middle we simply call a function called `handle_irq()` which is written i
 void handle_irq() {
     unsigned int irq = REGS_IRQ->irq0_pending_0;
 
-    while(irq) {
+    while(irq & (SYS_TIMER_IRQ_1 | SYS_TIMER_IRQ_3)) {
         if (irq & SYS_TIMER_IRQ_1) {
             irq &= ~SYS_TIMER_IRQ_1;
 
@@ -117,7 +118,9 @@ To begin receiving interrupts, we need to take one more step: unmasking all type
 
 Masking is a technique used by the CPU to prevent a particular piece of code from being stopped in its tracks by an interrupt. It's used to protect important code that *must* complete. Imagine what would happen if our `kernel_entry` code (that saves register state) was interrupted halfway through! In this case, the register state would be overwritten and lost. This is why the CPU automatically masks all interrupts when an exception handler is executed.
 
-The `irq_enable` and `irq_disable` functions in _utils.S_ are responsible for masking and unmasking interrupts:
+The `irq_enable` and `irq_disable` functions in _utils.S_ are responsible for masking and unmasking interrupts.
+
+They are helped by the `irq_barrier` function which ensures that the `enable_interrupt_controller()` call properly finishes before the `irq_enable()` call is made:
 
 ```c
 .globl irq_enable
@@ -129,6 +132,11 @@ irq_enable:
 irq_disable:
     msr daifset, #2
     ret
+
+.globl irq_barrier
+irq_barrier:
+    dsb sy
+    ret
 ```
 
 As soon as `irq_enable()` is called from `main()` in _kernel.c_, the timer handler is run when the timer interrupt fires. Well, sort of...!

part13-interrupts/kernel/irq.c

@@ -11,7 +11,7 @@ void disable_interrupt_controller() {
 void handle_irq() {
     unsigned int irq = REGS_IRQ->irq0_pending_0;
 
-    while(irq) {
+    while(irq & (SYS_TIMER_IRQ_1 | SYS_TIMER_IRQ_3)) {
         if (irq & SYS_TIMER_IRQ_1) {
             irq &= ~SYS_TIMER_IRQ_1;
 

part13-interrupts/kernel/kernel.c

@@ -120,6 +120,7 @@ void main(void)
 
     irq_init_vectors();
     enable_interrupt_controller();
+    irq_barrier();
     irq_enable();
     timer_init();
 

part13-interrupts/kernel/kernel.h

@@ -38,6 +38,7 @@ enum vc_irqs {
 
 void irq_init_vectors();
 void irq_enable();
+void irq_barrier();
 void irq_disable();
 void enable_interrupt_controller();
 void disable_interrupt_controller();

part13-interrupts/kernel/utils.S

@@ -13,3 +13,8 @@ irq_enable:
 irq_disable:
     msr daifset, #2
     ret
+
+.globl irq_barrier
+irq_barrier:
+    dsb sy
+    ret

part14-spi-ethernet/kernel/irq.c

@@ -11,7 +11,7 @@ void disable_interrupt_controller() {
 void handle_irq() {
     unsigned int irq = REGS_IRQ->irq0_pending_0;
 
-    while(irq) {
+    while(irq & (SYS_TIMER_IRQ_1 | SYS_TIMER_IRQ_3)) {
         if (irq & SYS_TIMER_IRQ_1) {
             irq &= ~SYS_TIMER_IRQ_1;
 

part14-spi-ethernet/kernel/kernel.c

@@ -147,6 +147,7 @@ void main(void)
 
     irq_init_vectors();
     enable_interrupt_controller();
+    irq_barrier();
     irq_enable();
     timer_init();
 

part14-spi-ethernet/kernel/kernel.h

@@ -38,6 +38,7 @@ enum vc_irqs {
 
 void irq_init_vectors();
 void irq_enable();
+void irq_barrier();
 void irq_disable();
 void enable_interrupt_controller();
 void disable_interrupt_controller();

part14-spi-ethernet/kernel/utils.S

@@ -13,3 +13,8 @@ irq_enable:
 irq_disable:
     msr daifset, #2
     ret
+
+.globl irq_barrier
+irq_barrier:
+    dsb sy
+    ret