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Updated README for part13-interrupts
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@ -35,6 +35,7 @@ The timers are set up using these calls:
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```c
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```c
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irq_init_vectors();
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irq_init_vectors();
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enable_interrupt_controller();
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enable_interrupt_controller();
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irq_barrier();
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irq_enable();
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irq_enable();
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timer_init();
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timer_init();
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```
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```
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@ -77,7 +78,7 @@ In the middle we simply call a function called `handle_irq()` which is written i
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void handle_irq() {
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void handle_irq() {
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unsigned int irq = REGS_IRQ->irq0_pending_0;
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unsigned int irq = REGS_IRQ->irq0_pending_0;
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while(irq) {
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while(irq & (SYS_TIMER_IRQ_1 | SYS_TIMER_IRQ_3)) {
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if (irq & SYS_TIMER_IRQ_1) {
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if (irq & SYS_TIMER_IRQ_1) {
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irq &= ~SYS_TIMER_IRQ_1;
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irq &= ~SYS_TIMER_IRQ_1;
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@ -119,6 +120,8 @@ Masking is a technique used by the CPU to prevent a particular piece of code fro
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The `irq_enable` and `irq_disable` functions in _utils.S_ are responsible for masking and unmasking interrupts:
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The `irq_enable` and `irq_disable` functions in _utils.S_ are responsible for masking and unmasking interrupts:
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They are helped by the `irq_barrier` function which ensures that the `enable_interrupt_controller()` call properly finishes before the `irq_enable()` call is made.
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```c
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```c
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.globl irq_enable
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.globl irq_enable
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irq_enable:
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irq_enable:
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@ -129,6 +132,11 @@ irq_enable:
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irq_disable:
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irq_disable:
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msr daifset, #2
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msr daifset, #2
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ret
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ret
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.globl irq_barrier
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irq_barrier:
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dsb sy
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ret
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```
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```
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As soon as `irq_enable()` is called from `main()` in _kernel.c_, the timer handler is run when the timer interrupt fires. Well, sort of...!
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As soon as `irq_enable()` is called from `main()` in _kernel.c_, the timer handler is run when the timer interrupt fires. Well, sort of...!
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