Added some clocking to Ethernet over SPI example

This commit is contained in:
Adam Greenwood-Byrne 2021-10-30 18:16:02 +01:00
parent bbe5d156b7
commit 29b864719c
3 changed files with 27 additions and 23 deletions

View file

@ -158,15 +158,15 @@ void arp_test(void)
debugcrlf();
while (1) {
if (!ENC_GetReceivedFrame(&handle)) {
continue;
}
while (!(handle.interruptFlags & EIR_PKTIF)) ENC_IRQHandler(&handle);
uint16_t len = handle.RxFrameInfos.length;
debugstr("Got one... ");
ENC_GetReceivedFrame(&handle);
//uint16_t len = handle.RxFrameInfos.length;
uint8_t *buffer = (uint8_t *)handle.RxFrameInfos.buffer;
checkPacket = (ARP *)buffer;
if (len > 0) {
if (!memcmp(checkPacket->senderIP, routerIP, 4)) {
// Success! We have found our router's MAC address
@ -184,18 +184,13 @@ void arp_test(void)
}
}
}
}
void init_network(void)
{
handle.Init.DuplexMode = ETH_MODE_HALFDUPLEX;
handle.Init.MACAddr = myMAC;
handle.Init.ChecksumMode = ETH_CHECKSUM_BY_HARDWARE;
handle.Init.InterruptEnableBits = EIE_LINKIE;
debugstr("Setting MAC address to C0:FF:EE:C0:FF:EE.");
debugcrlf();
ENC_SetMacAddr(&handle);
handle.Init.InterruptEnableBits = EIE_LINKIE | EIE_PKTIE;
debugstr("Starting network up.");
debugcrlf();

View file

@ -46,6 +46,9 @@ void spi_init() {
gpio_useAsAlt0(9); //MISO
gpio_useAsAlt0(10); //MOSI
gpio_useAsAlt0(11); //SCLK
REGS_SPI0->cs = 0x30;
REGS_SPI0->clock = 0x28; // 500Mhz / 40 = 12.5Mhz for ENC SPI
}
void spi_chip_select(unsigned char chip_select) {

View file

@ -847,6 +847,10 @@ bool ENC_Start(ENC_HandleTypeDef *handle)
enc_wrbreg(handle, ENC_MAMXFLL, (CONFIG_NET_ETH_MTU+18) & 0xff);
enc_wrbreg(handle, ENC_MAMXFLH, (CONFIG_NET_ETH_MTU+18) >> 8);
/* Set the Mac Address */
ENC_SetMacAddr(handle);
/* Configure LEDs (No, just use the defaults for now) */
/* enc_wrphy(priv, ENC_PHLCON, ??); */
@ -927,6 +931,8 @@ void ENC_SetMacAddr(ENC_HandleTypeDef *handle)
enc_wrbreg(handle, ENC_MAADR4, handle->Init.MACAddr[3]);
enc_wrbreg(handle, ENC_MAADR5, handle->Init.MACAddr[4]);
enc_wrbreg(handle, ENC_MAADR6, handle->Init.MACAddr[5]);
enc_wrbreg(handle, ENC_ECOCON, 0x2 & 0x7); // 12.5Mhz
}