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Finished part10 write-up
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@ -58,7 +58,7 @@ msr cntvoff_el2, xzr
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Our timer is now as we need it.
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Spinning up the cores
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Booting the main core
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---------------------
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We go on to check the processor ID as we always have. If it's zero then we're on the main core and we jump forward to label `2:`. This time, we have to set our stack pointer slightly differently. We can't set it below our code, because it's at 0x00000 now! Instead, we use the address we defined earlier as `MAIN_STACK` at the top:
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@ -69,8 +69,8 @@ mov sp, #MAIN_STACK
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We then continue to clear the BSS as always, and jump to our `main()` function in C code. If it does happen to return, we branch back to `1:` to halt the core.
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Waking the secondary cores
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--------------------------
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Setting up the secondary cores
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------------------------------
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Previously, we've unequivocally halted the other cores by spinning them in an infinite loop at label `1:`. Instead, each core will now watch a value at its own designated memory address, initialised to zero at the bottom of _boot.S_, and named as `spin_cpu0-3`. If this value goes non-zero, then that's a signal to wake up and jump to that memory location, executing whatever code is there. Once that code returns, we start looping and watching all over again.
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```c
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@ -116,13 +116,40 @@ You'll notice that we've set our stack pointer elsewhere, and each core has its
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Phew! That's it for the bootloader code. If you use this new bootloader with your existing code, the RPi4 should boot and run as before. We now need to go on to implement the signalling required to execute code on these secondary cores which are now at our disposal.
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Signalling to the secondary cores from C
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----------------------------------------
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For now, I'll signpost the following additional points of interest in the code:
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Waking the secondary cores from C
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---------------------------------
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Check out _multicore.c_.
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* The new _multicore.c_ library and related _multicore.h_ header
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* A revised _kernel.c_ with a new multicore approach to `main()`
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Here we essentially duplicate two functions for each core:
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I will write more soon to attempt to explain what's going on here.
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```c
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void start_core1(void (*func)(void))
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{
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store32((unsigned long)&spin_cpu1, (unsigned long)func);
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asm volatile ("sev");
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}
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void clear_core1(void)
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{
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store32((unsigned long)&spin_cpu1, 0);
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}
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```
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The first, `start_core1()`, uses the `store32()` function (also in _multicore.c_) to write an address to our predefined `spin_cpu1` memory location. This takes it non-zero, telling core 1 where to jump to when it wakes. Since we put it to sleep with a `wfe` (Wait For Event) instruction, we use a `sev` (Set Event) instruction to wake it again.
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The second, `clear_core1()`, can be used by an executing function to reset `spin_cpu1` to zero, so the core won't jump again when the executing code returns.
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More main()'s please!
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---------------------
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Finally, we look at _kernel.c_, where we now have a single `main()`, but also:
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* `core0_main()` - increments a progress bar every 1 second (roughly)
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* `core1_main()` - has a two-step progress bar, playing an audio sample using the CPU at 50%, jumping straight to 100% when done
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* `core2_main()` - sets a DMA audio transfer, then increments a progress bar every half second (roughly), jumping to 100% as playback finishes
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* ... and `core3_main()` - increments a progress bar every quarter second (roughly)
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`main()` is core 0's entry point, which ultimately falls through to `core0_main()`, but not before it kicks off `core3_main()` and `core1_main()` by passing them to their respective start functions. When `core1_main()` finishes, it kicks off `core2_main()`.
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_As you run this, you'll see that these functions run in parallel on their respective cores. Welcome to symmetric multi-processing!_
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![Code now running on all four cores of the Raspberry Pi 4](images/10-multicore-running.jpg)
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